Logic circuits are constantly evolving toward higher densities and higher speeds. To accomplish this, small amplitude signals are being used more frequently to transport data over wide data buses that are internal or external to a semiconductor chip. The small signal transmission is used because the switching power is proportional to CV2f where C is the load capacitance, V is the voltage, and f is the frequency of the switching. The frequency used for switching on data buses has been constantly increasing to accommodate more data per unit time and the logic voltages have been decreasing to conserve power. Small amplitude signals which can significantly reduce switching power, however, require small signal detection and amplification at the receiving end to differentiate logic levels.
The small amplitude signals, or simply small logic signals, or small signals, typically have amplitudes that are 10-20% of the supply voltage (VDD) of a given technology. The threshold voltage (Vt) variation (e.g., 10-20% of VDD) in the Field-Effect Transistors (FETs) utilized in conventional logic circuits, however, is comparable to the small logic signal amplitude. Logic circuits based on traditional Field-Effect Transistor designs are therefore not able to accurately sense and perform logic operations on small logic signals. This is true for both current and future generations of integrated circuit technologies and, thus, conventional FET logic circuits are not able to handle small logic signals. To overcome the limitation due to the relatively small difference in amplitude between logic levels, small signal sensing circuits must be used in conjunction with logic circuits so that the small logic signals can be detected precisely. For example, when voltages under one volt are being used as the high logic level for small amplitude signals, traditional logic circuits are often unable to reliably detect the signal's high logic level without the use of small signal sensing circuits.
Many circuits for memory and data transmission require sense amplifiers for the detection of single ended small signals, and amplification to the full supply voltage level (VDD). Differential sense amplifiers for complementary signal sensing have been widely adopted as they have high signal-to-noise (S/N) margin and high rejection for common mode noise. Single ended sense amplifiers for small signals remain a challenge as the reference voltage point used to separate the 0- and 1-state of the small signal may vary as much as the small signal itself, due to variations in the manufacturing process, device threshold voltage, and temperature. Many signal sources are single ended, such as a DRAM cell, but have been configured with balanced differential signal lines for sensing for the above reason. As FET's are scaled down further (to 65 nm and beyond), the variation of transistor threshold voltage between nearby devices due to statistical fluctuation will be greater and the advantage of differential sensing will be reduced.
A need therefore exists for small signal sensing circuits that can be used in conjunction with conventional logic circuits to process and perform logic operations on small amplitude signals.